開源人年會 2022

The University of Electro-Communications Integrated Circuit Design Laboratory educates the design, implementation, and evaluation of hardware systems and VLSI, aims to design “system on chip” by integrating various information processing hardware, and develops a high-performance computational circuit realized with a small number of elements.
Kesami Hagiwara has been designing a chip using RISC-V coreplex on various tools. Kesamis prior job research has been conducted on CPU, cache controller, interrupt controller, memory controller, low power processor architecture of microcontroller for automotive applications, industrial equipment and consumer products, architecture of low power consumption, automobile control with high code efficiency, and low latency consumer industry and development of a CPU core for realtime controllers. Kesami is also working on extremely low power and high performance processor for internet of things (IoT) device. Kesami integrated SH Consulting’s 2-stage pipeline SH-2 CPU implementation.