Satish Kumar
Myself Satish kumar G having 13 years exp. in Embedded systems both in Firmware & Linux kernel exp. with different ARM controllers & ARM Processor. Having work exp. in TI OMAP, XiIinx Zynq Z7000, Cavium OcteonTx, LPC, ST Micro, TI Tiva series Micro controllers with Bare metal, RIOT, FreeRTOS, Linux kernel & worked on Xilinx FPGA boards.
Session
This session represents, Bare metal drivers debug on FPGA board starting with Startup code & different controllers(Interrupt Controller,Timer,UART,QSPI) present onboard.
This session describes in detail of controller
Setup,Init,Functionality,Stop,&Shutdown procedure.
This session is useful to understand the FSBL u-boot code (First stage boot loader) in the form of Bare metal drivers & so it is useful in debugging u-boot code in a granular level.
SoC: Xilinx Zynq Zc702 (ARM Cortex A9 Dual core)
Board used: Xilinx FPGA Board (ZED Board)