BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//pretalx//pretalx.com//scipy-2026//talk//TXQ7WP
BEGIN:VTIMEZONE
TZID:CST
BEGIN:STANDARD
DTSTART:20001029T030000
RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10;UNTIL=20061029T080000Z
TZNAME:CST
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
END:STANDARD
BEGIN:STANDARD
DTSTART:20071104T030000
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:CST
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
END:STANDARD
BEGIN:DAYLIGHT
DTSTART:20000402T030000
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=4;UNTIL=20060402T090000Z
TZNAME:CDT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
END:DAYLIGHT
BEGIN:DAYLIGHT
DTSTART:20070311T030000
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:CDT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
END:DAYLIGHT
END:VTIMEZONE
BEGIN:VEVENT
UID:pretalx-scipy-2026-TXQ7WP@pretalx.com
DTSTART;TZID=CST:20260713T133000
DTEND;TZID=CST:20260713T173000
DESCRIPTION:You’ll learn a repeatable workflow to accelerate real numeric
  kernels using  \nCPU SIMD\, GPU arrays + custom kernels\, and TPU/XLA com
 pilation—all from Python.\n\nFor each acceleration tier we follow the sa
 me loop: theory → minimal working code → benchmark  \nthat confirms (o
 r disproves) the theory. You’ll leave with a small benchmark harness you
  can reuse\,  \nplus a decision checklist for when SIMD is enough\, when G
 PUs pay off\, and when XLA/TPU is the right move.
DTSTAMP:20260622T110152Z
LOCATION:Accelerated Computing
SUMMARY:HighLoad Python: SIMD\, GPU\, TPU. Acceleration Patterns: Theory\, 
 Practice\, Benchmarks. Looking into Silicon. - Petr Andreev
URL:https://pretalx.com/scipy-2026/talk/TXQ7WP/
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