DENOG17

200 GbE network processing with 100 W - or "can I *make* a chip for that?"
10.11.2025 , Saal B

This talk presents how networking tasks can be offloaded to dedicated hardware/NPUs (network processing units) and why this is a great idea.
First, we take a look at the fundamentals of digital circuit design, what it is and how it is done.
Then, focus is on how oflloading network tasks is a particularly beautiful example of the advantages of hardware-implementing logic, with examples like TCP offloading, cybersecurity applications, or traffic shaping, and why time (= increasing network bandwidth) is playing to the advantage of dedicated chips vs. CPUs/software.
To be fair and balanced, there will also be a look at the downsides of chips, but of course also ideas for mitigating them.
Finally, there will be a look at what's out there, and how to integrate custom chips into your systems.

Siehe auch: Slides (2,4 MB)

I'm co-founder of Synogate, a startup for chip design (RTL/VLSI) and FPGA development with focus on network accelerators, smartNIC applications, and stateful networking/flow tracking at 100+ GbE.
We have deep roots in software development, expertise in IP networks and a free and open-source framework for more productive and accessible digital circuit design called "Gatery". With this, we quickly develop highly performant, efficient and secure networking solutions for data centers and internet infrastructure.